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For the semiconductor industry’s scientists and engineers, this program provides an opportunity to learn the fundamentals of lithography materials science and technology.
半導体業界の人材育成の一環として、リソグラフィー材料に関する科学と技術の基礎を学ぶ機会を提供する
Introduction to EUV Lithography
Dr. Harry Levinson
HJL Lithography
USA
Harry J. Levinson is currently an independent lithography consultant and Principal Lithographer at HJL Lithography. He is the author of three books: Lithography Process Control, and Principles of Lithography, and Extreme Ultraviolet Lithography. In 2022 he received the SPIE Frits Zernike Award in Microlithography. Levinson is currently Editor-in-Chief of the Journal of Micro/Nanopatterning, Materials and Metrology (JM3).
This course explains the basic principles of extreme ultraviolet (EUV) lithography. Key elements of EUV lithographic technology and the challenges for each are described: multilayer reflectors, sources of EUV light, optics, resists exposure systems, masks, and computational lithography. Emphasis will be on those aspects of EUV lithography that differ significantly from optical lithography. Descriptions are given of the ways in which physics and costs influenced choices made during the development of EUV lithography. High-NA EUV lithography will be described, and paths for extending EUV lithography even further will also be discussed.
The Physics of the Exposure of Photoresists to Extreme Ultraviolet (EUV, 13.5 nm) Light (From the Perspective of a Chemist)
Prof. Robert Brainard
State University of New York
USA
Prof. Robert Brainard received his B.S. in Chemistry from U.C. Berkeley and a Ph.D. in Chemistry while working with Professor G. Whitesides at MIT and Harvard University. Following his post-doctoral studies with Professor R. Madix at Stanford University, he worked for Polaroid and Shipley/RHEM in the areas of: DUV, EUV and E-Beam Photoresists. Prof. Brainard is now a Professor at University at Albany studying: EUV photoresist exposure mechanisms; High quantum efficiency EUV photoresists; Acid amplifiers for use in EUV Lithography; Design and synthesis of photo-imageable hydrogels for cell growth; Molecular Organometallic Resists for EUV (MORE).
For the past fifty years, the microelectronics industry has been on a relentless pace to improve the performance of integrated circuits by fabricating more transistors onto every chip. One key technology which has made these dramatic improvements possible has been photoresists (Figure 1A). Central to improving the resolution capability of photoresists has been the successive reduction in the wavelength of light used to expose them. Currently, the microelectronics industry is undergoing a jump in wavelength from 193 to 13.5 nm. This new wavelength is called Extreme Ultraviolet (EUV)) light. This large change in wavelength comes with a concomitant change in photon energy (6.4 to 92 eV) which creates several interesting problems for chemists and physicists to solve.
This presentation will start with a broad introduction to photoresists and EUV lithography. It then will describe how 92 eV EUV photons ionize molecules in resists, creating holes and free electrons, and identify and discuss the individual interactions that occur with atoms (Figure 1B). However, the number of electrons created, their reaction mechanisms, their lifetimes and their reaction cross-sections are not well known. The presentation will discuss experimental results and provide insight into these poorly understood aspects of EUV exposure mechanisms (Figure 1C).
Lastly, the presentation will discuss the challenges associated with the low numbers of high-energy photons that are available during exposure relative to the longer wavelength 193-nm lithography that proceeded EUV. These low numbers of photons create statistical-noise problems described as shot-noise and related to Poisson statistics. These statistics ultimately place a limit to the ultimate resolution, line-roughness, and sensitivity of this imaging technology.
Using Resist Lithographic Responses to Map the Projected Image for Material Evaluation and Process Design
Prof. John Petersen
imec
Belgium
John S. Petersen, Scientific Director of Lithography at imec and co-lead of AttoLab, has over 46 years of semiconductor experience spanning optical and EUV lithography, super‑resolution, and holography. An SPIE and former SEMATECH Fellow, he has 100+ publications, 13 patents, and serves as Adjunct Professor at the University of Maryland. His work advances actinic inspection, EUV photon–resist physics, and next‑generation patterning. ORCID: 0000‑0003‑4815‑3770
This tutorial provides a unified overview of how optical and EUV photoresists record and process aerial images. It examines resist bulk and lithographic responses, showing how nonlinear sampling, image contrast, and chemical contrast define feature size, process bias, and isofocal behaviour. Focus–exposure analysis, NILS, and intensity‑threshold sampling are used to quantify resist‑induced imaging biases. Unbiased PSD analysis characterizes LER/LWR, correlation length, and stochastic limits arising from photon statistics, electron blur, reaction‑diffusion, and development percolation. Comparisons of chemically amplified and metal‑oxide resists reveal material‑specific roughness and RLS trade-offs, guiding OPC development and resist optimization.
Addressing Sustainability Challenges in PFAS Regulation
Mr. Tomohide Katayama
Merck
Japan
Mr. Tomohide Katayama is a seasoned expert in lithography materials and semiconductor processes, with over 30 years of experience. He began his career at Toshiba (1994–2000) as a lithography process engineer, followed by a role at Nichia Chemical (2000–2001) leading R&D for laser diode mask development. Since 2001, he has held various leadership roles at Merck, including Patterning R&D Manager and Global Application Director.
He currently heads Merck Patterning R&D Japan, focusing on advanced materials such as BARC, SOC, TC, MHM, rinse, and shrink materials. Mr. Katayama has played a key role in driving innovation in patterning technology.
As attention on PFAS continues to grow across the semiconductor industry, chip manufacturers and suppliers are rapidly adapting to evolving POPs trends and regional chemical regulations. This tutorial explores how Merck is responding to these changes—offering insights into PFAS dynamics and presenting our strategy to enable sustainable and compliant solutions for rinse, TARC, and photoresists.
Why Are Photosensitive/Non-Photosensitive Polymers Important in Advanced Semiconductor Packaging?
Prof. Takafumi Fukushima
Tohoku University
Japan
Takafumi Fukushima received his Ph.D. degree in the Department of Materials Science and Chemical Engineering from Yokohama National University in 2003. From 2024 to 2009, he was an assistant professor at the Department of Bioengineering and Robotics at Tohoku University. Since 2010, he has been an associate professor at the New Industry Creation Hatchery Center (NICHe), Tohoku University. From 2016 to 2017 and 2022, He was a visiting faculty at UCLA CHIPS. He is currently working on Advanced Microelectronic Packaging at the Department of Biomechanical Engineering, Tohoku University, as a professor. He is also the head of 3D Packaging Technology Division, Leading-edge Semiconductor Technology Center (LSTC), Japan.
Photosensitive and non‑photosensitive polymers play essential roles in enabling next‑generation semiconductor packaging. Their unique combinations of patternability, mechanical reliability, dielectric performance, and process versatility support the ongoing shift toward heterogeneous integration, chiplet architectures, and fine‑pitch interconnects. Photosensitive polymers enable high‑resolution formation of RDLs and microvias, while non‑photosensitive polymers provide superior thermal stability, warpage control, heat dissipation, and dielectrics for large‑area and high‑power aapplications. This tutorial explains the fundamental properties, processing methods, and integration challenges of these materials, and highlights emerging trends that make polymers indispensable for achieving performance, scalability, and manufacturability in advanced semiconductor packaging.
Advanced Packaging Materials and Co-Creative Evaluation Platforms at Resonac
Dr. Sadaaki Katoh
Resonac
Japan
Joined the former Hitachi Chemical (now Resonac) in 2005.
12 years of experience in developing photosensitive material for wafer/panel process.
Then, stationed in Suzhou, China 4 years to research new materials and develop photosensitive products.
Returned to Japan in 2021 and joined the Packaging Solution Center, involved in the establishment of a new consortium, JOINT2, to develop materials and processes for 2.xD packages, up to now.
Resonac positions itself as a co-creative chemical company, aiming to solve advanced packaging challenges that cannot be addressed by a single company alone through cocreation with diverse stakeholders. As part of this approach, Resonac has established the Packaging Solution Center and the co-creative evaluation platform JOINT2, while further expanding these activities and evolving them into initiatives such as US-JOINT and JOINT3. For 2.xD and 3D packages, higher-density integration requires close collaboration across materials, equipment, and substrate technologies. This presentation introduces Resonac’s co-creation activities, along with its high-performance materials portfolio used within these collaborative frameworks
Photopolymers Enabling Fine-Pitch Cu RDL Damascene: Materials, Process, and Integration
Dr. Toshiyuki Ogata
Taiyo Holdings
Japan
Toshiyuki Ogata joined Tokyo Ohka Kogyo Co., Ltd. in 1997, working in R&D on semiconductor photoresists and temporary bonding adhesives. From 2007 to 2011, he researched next‑generation lithography as a visiting researcher in the Willson Group, Department of Chemistry, The University of Texas at Austin. He later joined Taiyo Holdings Co., Ltd., and since 2022 has led a 3D packaging materials project, overseeing marketing for advanced semiconductor packaging materials.
This tutorial reviews redistribution layer (RDL) technology for advanced packaging, including fan-out wafer-level packaging, system-in-package, and 3D ICs. It describes the evolution from semi-additive processes using plating resists for fine-pitch wiring to Cu damascene-based RDL derived from front-end interconnect technology. The focus is on photopolymer performance requirements, material design strategies, and process integration challenges for achieving submicron, fine-pitch Cu RDL suitable for nextgeneration semiconductor packaging.